MinnowBoard Lure Daughter cards are provided separately. They can be custom developed to expose features and interfaces as required for developer applications. They are “stackable” up to a depth of four devices.
The I2C bus of the MinnowBoard Lure will have four addresses reserved to access information regarding the capabilities and configuration of the MinnowBoard Lure. Each MinnowBoard Lure will have a dip switch allowing the developer to assign the address to the configuration storage per card. Information currently planned to be stored in Advanced Configuration and Power Interface (ACPI) Secondary System Descriptor Table (SSDT) format (still under review).
|8 – GPIO signals||Same signals as the buffered/pinned GPIOs on the Motherboard|
|I2C bus||Four addresses reserved for MinnowLure configuration / capability data access|
|PCIe||3-1x or (1-1x and 1-2x)|
|2 – UARTS||UART (1 & 2)|
|2 – USB (host)||Ports 4 & 5|